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| CALIFORNIA MICRO DEVICES SN 74S1051 12-BIT SCHOTTKY BARRIER DIODE BUS TERMINATOR Features 24 integrated diodes in a single package offers 12 channel, dual rail clamping action Provides proper bus termination independent of external line or card loading conditions Schottky diode technology; excellent forward voltage and reverse recovery characteristics Enhanced performance over existing device 16-pin SOIC package Applications Local high speed bus termination for all popular RISC and embedded microprocessor applications High speed memory and SDRAM memory bus termination Product Description Reflections on high speed data lines lead to undershoot and overshoot disturbances which may result in improper system operation. Resistor terminations, when used to terminate high speed data lines, increase power consumption and degrade output (high) levels resulting in reduced noise immunity. Schottky diode termination is the best overall solution for applications in which power consumption and noise immunity are critical considerations. This integrated Schottky diode network provides very effective termination performance for high speed data lines under variable loading conditions. The device supports up to 12 terminated lines per package each of which can be simultaneously clamped to both ground and power supply rail. SCHEMATIC CONFIGURATION D01 D02 D03 D04 2 3 4 5 D05 6 D06 D07 D08 7 10 11 D09 D10 D11 12 13 14 D12 15 VDD 1 VDD 16 8 GND 9 GND (c)1998 California Micro Devices Corp. All rights reserved. P/Active is a registered trademark and PAC is a (c)1998 California(R)Micro Devices Corp. All rights reserved. trademark of California Micro Devices. 4 / 98 4 / 98 C0220298D 215 Topaz Street, California 95035 Tel: (408) 263-3214 (408) 263-7846263-7846 Fax: (408) www.calmicro.com 215 Topaz Street, Milpitas,Milpitas, California 95035 (408) 263-3214 Tel: Fax: www.calmicro.com 1 CALIFORNIA MICRO DEVICES SN 74S1051 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Channel clamp current (continuous) Operating Temperature Storage Temperature Package Power Rating STANDARD SPECIFICATIONS Symbol VDD Iclamp Tstg Rating -0.3V to +7V 50mA 0OC to 70OC -65 OC to +150OC 625mW, max. The absolute maximum ratings are limiting values, to be applied individually, beyond which the device may be permanently damaged. Functional operation under any of these conditions is not guaranteed. Exposing the device to its absolute maximum rating may affect its reliability. DIODE CHARACTERISTICS (TA = 0O to 70OC) Parameter Conditions Min Diode foward voltage To VDD IF = 16 mA IF = 50 mA 0.55V From GND IF = 16 mA IF = 50 mA 0.50V Reverse Recovery Time (See Note 1) IF = 50mA (estimated) Channel leakage 0 VIN VDD Input Capacitance f = 1 MHz, VIN = 2.5V, TA = 25OC, VDD = 5.0V ESD Protection MIL-STD-883, Method 3015 4KV Typ 0.55V 0.70V 0.50V 0.65V 0.1A 5pF Max 0.70V 0.90V 0.65V 0.85V <400pS 5A Pins 16 Pa c k a g e SOIC Narrow STANDARD PART ORDERING INFORMATION Orde ring Part N um be r Style Tube s Tape & R e e l SN 74S1051/T SN 74S1051/R Part Mark ing SN 74S1051 Note 1: The test circuit depicts the Schottky diodes in their typical application. The impact of a reverse recovery time is measured using a narrow pulse with 670- pS rise and fall times. This pulse propagates down a 60 cm, 54 ohm strip line fabricated on a multi-layer, controlled impedance printed circuit board. In testing the ground clamp diode, the negative going edge of the pulse causes a reflection which forces the diode under test to become forward biased. The positive going edge of the pulse attempts to pull this diode out of forward conduction. A reverse recovery phenomenon would cause a delay between the known arrival time of the positive edge and the observed edge due to the time it takes for the forward biased diode to actually become reversed biased. In this measurement, however, there is no observable difference and therefore no delay for the positive edge due to the presence of the diode. The waveforms are adjusted to individually test the ground and VDD clamps. See test circuit. VDD ABT16244A Pulse Generator Z0, L Diode under test Test Circuit. Line length, pulse width and duty cycle are selected such as that only one reflection is involved in the measurement. (c)1998 California Micro Devices Corp. All rights reserved. 2 215 Topaz Street, Milpitas, California 95035 Tel: (408) 263-3214 Fax: (408) 263-7846 www.calmicro.com 4 / 98 |
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